The group is liable for the verification of subsequent technology Built-in Excessive Pace RF Transceiver SoC Merchandise. These merchandise includes of excessive efficiency Transceivers containing Built-in RF Sign chain elements with excessive diploma of digital integration. The group handles verification of the merchandise which embrace digital sign processing datapaths, excessive velocity interfaces, embedded microprocessor methods and DFE capabilities that go into these merchandise.
As an skilled Senior engineer on this group, candidate will work with the newest verification methodologies on designs starting from particular person blocks to chiplevel and system stage verification for these SoCs at software stage.
- Verification of complicated designs and subsytems utilizing probably the most forefront methodologies.
- Affect the choices on methodolgies to be adopted for the verification.
- Architect the testbench and develop in UVM and Formal primarily based verification approaches.
- Combine the block testbench at chiplevel UVM atmosphere and confirm integration.
- Outline testplan, assessments and verification methodology for block / chiplevel verification.
- Work with design group in producing test-plans and closure of code and useful protection.
- Steady interplay with analog co-sim and firmware group in enabling toplevel chip verification points.
- Assist post-silicon verification actions of the merchandise working with design, product analysis and functions engineering group
- BTech/MTech diploma in Electrical/Electronics/Laptop science from reputed institutes
- 3 – eight years of expertise in design verification with UVM and constrained random, protection primarily based verification approaches.
- Adaptability to be taught finish software/methods and map into good verification take a look at plan at system stage
- Glorious debugging and analytical abilities
- Data of Assertion primarily based formal verification might be a plus
- Good verbal and written communication abilities
Firm: Analog Units